Learning objectives
What you should understand
- Explain page faults on a latency-sensitive path
- Lock only the memory the process can safely retain
- Prefault stacks, arenas and mappings predictably
Lab
Hands-on exercise
Compare first-touch and prefaulted latency while recording faults.
Deliverable
Evidence of completion
A memory-readiness checklist with fault and tail-latency evidence.
- Prerequisite
- EP 24