cppvalleyC++ · Systems · Low Latency · HFT
HFT Core Systems

HFT CORE SYSTEMS

Interrupts, NAPI, softirqs, and NIC queues

Lesson 24 of 96Phase 03: Linux determinism
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The written objectives and hands-on lab are available now.

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Learning objectives

What you should understand

  1. Trace receive work from interrupt to softirq
  2. Map NIC queues and IRQs to CPUs
  3. Recognize budget exhaustion and processing backlog

Lab

Hands-on exercise

Correlate packet load with IRQ, softirq and latency behavior.

Deliverable

Evidence of completion

An annotated receive-work timeline and CPU-affinity map.

Prerequisite
EP 23

Phase 03

Linux determinism

Full curriculum
21Scheduler classes and real-time hazards22Affinity, topology, SMT, and migration23CPU isolation as a system configuration24Interrupts, NAPI, softirqs, and NIC queues25Memory locking and prefaulting26Power management, turbo, C-states, and thermal behavior27Finding OS noise with rtla, ftrace, and perf28System calls and context switches are different things29Shared memory IPC with explicit ownership30cgroup v2, cpusets, memory nodes, and least privilege31Asynchronous logging: page cache, direct I/O, and io_uring32Phase gate: reproducible low-jitter host profile